ENA_RXEV=DISABLED_RXEV_OUTPU, SEL_PMATCH=PIN_INTERRUPT_INTER
GPIO pattern match interrupt control register
| SEL_PMATCH | Specifies whether the 8 pin interrupts are controlled by the pin interrupt function or by the pattern match function. 0 (PIN_INTERRUPT_INTER): Pin interrupt. Interrupts are driven in response to the standard pin interrupt function 1 (PATTERN_MATCH_INTER): Pattern match. Interrupts are driven in response to pattern matches. |
| ENA_RXEV | Enables the RxEv output to the ARM cpu and/or to a GPIO output when the specified boolean expression evaluates to true. 0 (DISABLED_RXEV_OUTPU): Disabled. RxEv output to the cpu is disabled. 1 (ENABLED_RXEV_OUTPUT): Enabled. RxEv output to the cpu is enabled. |
| RESERVED | Reserved. Do not write 1s to unused bits. |
| PMAT | This field displays the current state of pattern matches. A 1 in any bit of this field indicates that the corresponding product term is matched by the current state of the appropriate inputs. |